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dc.contributor.authorTelba, A.*
dc.contributor.authorNoras, James M.*
dc.date.accessioned2016-10-07T14:39:17Z
dc.date.available2016-10-07T14:39:17Z
dc.date.issued2013
dc.identifier.citationTelba A and Noras JM (2013) Minimization of jitter in digital systems using dual phase-locked loops. International Journal of Engineering and Innovative Technology. 2(8): 105-107.
dc.identifier.urihttp://hdl.handle.net/10454/9740
dc.descriptionNo
dc.titleMinimization of jitter in digital systems using dual phase-locked loops
dc.status.refereedYes
dc.typeArticle
dc.type.versionNo full-text available in the repository


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