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    CMOS design enhancement techniques for RF receivers. Analysis, design and implementation of RF receivers with component enhancement and component reduction for improved sensitivity and reduced cost, using CMOS technology.

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    Publication date
    2010
    Author
    Logan, Nandi
    Supervisor
    Not named
    Keyword
    RF Receivers
    Inductors
    Noise Figure
    Component Quality Factor
    CMOS
    Sensitivity
    Compression Point
    LNA
    UMTS
    Rights
    Creative Commons License
    The University of Bradford theses are licenced under a Creative Commons Licence.
    Institution
    University of Bradford
    Department
    School of Engineering, Design and Technology
    Awarded
    2010
    
    Metadata
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    Abstract
    Silicon CMOS Technology is now the preferred process for low power wireless communication devices, although currently much noisier and slower than comparable processes such as SiGe Bipolar and GaAs technologies. However, due to ever-reducing gate sizes and correspondingly higher speeds, higher Ft CMOS processes are increasingly competitive, especially in low power wireless systems such as Bluetooth, Wireless USB, Wimax, Zigbee and W-CDMA transceivers. With the current 32 nm gate sized devices, speeds of 100 GHz and beyond are well within the horizon for CMOS technology, but at a reduced operational voltage, even with thicker gate oxides as compensation. This thesis investigates newer techniques, both from a systems point of view and at a circuit level, to implement an efficient transceiver design that will produce a more sensitive receiver, overcoming the noise disadvantage of using CMOS Silicon. As a starting point, the overall components and available SoC were investigated, together with their architecture. Two novel techniques were developed during this investigation. The first was a high compression point LNA design giving a lower overall systems noise figure for the receiver. The second was an innovative means of matching circuits with low Q components, which enabled the use of smaller inductors and reduced the attenuation loss of the components, the resulting smaller circuit die size leading to smaller and lower cost commercial radio equipment. Both these techniques have had patents filed by the University. Finally, the overall design was laid out for fabrication, taking into account package constraints and bond-wire effects and other parasitic EMC effects.
    URI
    http://hdl.handle.net/10454/5188
    Type
    Thesis
    Qualification name
    PhD
    Collections
    Theses

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